Through the study of this course, student can master the design of digital system, hardware description language HDL, FPGA development, CPU design principle and design from scratch, and lay an engineering foundation in the above aspects from theory to practice.
This course starts from the basic principles of digital systems, introduces HDL learning, then describes the CPU, and USES this knowledge to guide students to design their own CPU for practice. All parts contain two levels of principle and design.
Through the study of this course, on the basis of mastering the basic principles and practical methods of digital system and HDL language, master the principle and design method of CPU in essence, lay a strong foundation for microcomputer principle and other courses, and cultivate the ability of FPGA development and application.
The highlight of this course mainly lies in the novelty and innovation of the content, highlighting the continuity of each part, from the principle to the integrity of practice.
通过本课程的学习，可以从零开始掌握数字系统的设计、硬件描述语言HDL、FPGA的开发、CPU的设计原理和设计，从理论上到实践上在以上方面打下工程基础。
本课程从数字系统的基本原理出发，引入HDL语言的学习，然后对CPU进行描述，并使用这些知识引导学生设计自己的CPU进行实践。所有部分包含原理和设计两个层次。
通过本课程的学习，在掌握数字系统基本原理和实践方法、HDL语言的基础上，从本质上掌握CPU的原理和设计方法，为微机原理等课程做极强的铺垫，并培养了FPGA开发应用能力。
本课程的亮点主要在于内容的新颖和创新，突出各各部分的延续性，从原理再到实践的完整性。
master the digital system and application,realize the design of CPU, get HDL and FPGA design ability.
1.Digital System foundation（2weeks）
1.1 positional number system
1.2 Signed-Magnitude Representation
1.3 Complement Number Systems
1.4 Codes
1.5 Boolean algebra
Test for Unit1
Exercise for Unit1
2.Digital Circuit（2 weeks）
2.1.gates and design
2.2 electrical characteristics
Test for Unit2
3.Combinational Circuit Design(8)（13-20）
3.1 Description for Combinational Circuit
3.2 K-map
3.3 Combinational Digital Circuit Design
3.4 Decoder
3.5 Encoder
3.6 Parity-Checking
3.7 Comparator
Test for Unit3
Exercise for Unit3
4. Verilog HDL
4.1 Structure and Fundamental rules of Verilog
4.2 Data types and variables, constants
4.3 Operators
4.4 Assignment statement
4.5 conditional statement
4.6 HDL example for Combinational Circuit Design
Test for Unit4
5. Sequential Circuit
5.1 Sequential Circuit foundation
5.2 Latch and flip-flop
5.3 Sequential Logic Circuit analysis
5.4 Sequential Logic Circuit design
5.5 Counter
5.6 Signal Generator
Test for Unit5
Exercise for Unit5
6. CPU Design & Implemen
6.1 Computer Organization
6.2 Instruction and Instruction Set
6.3 Specification of our CPU
6.4 register files design
6.5 ALU design
Analog Circuit Foundation，C
模拟电路基础，C语言
《Digital System Design with Verilog and VHDL》
《Xilinx FPGA原理与实践—基于Vivado和Verilog HDL》
Q : If I learn this class ,should I learn another digital logic design clase or HDL class？
A : No,we have that kind of knowlege and HDL
Q : If I have no examental board,can I learn？
A : Yes,you can do simulation on Vivado.
Q : How can I learn too much in this course？
A : I am sure you can.
副教授
Professor
讲师
由高教社联手网易推出，让每一个有提升愿望的用户能够学到中国知名高校的课程，并获得认证。
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